Company Info

Partner

DMP is actively promoting membership of industry bodies and alliances with partner companies, to deliver solutions that provide total support for our customers, including everything from planning products that feature our graphics IP cores, through to application development.

Platforms

DMP’s graphics IP core delivers the high performance and low power consumption demanded by the market for embedded systems. At the same time, it can also be combined with platforms that have a track record of adoption in a wide range of situations, such as various microprocessors and operating systems. This means that our customers can develop the best possible products for a wide range of applications.

Intel® Embedded Alliance

DMP is a General Member of the Intel Embedded Alliance: a community of communications and embedded developers and solution providers. Through this alliance, we provide solutions that provide comprehensive support for the design and development of products that feature our graphics IP cores in combination with Intel architecture.

DMP is a member of the R-Mobile Consortium the R-Car Consortium, and R-Home Consortium which are sponsored by the Renesas Electronics Corporation. Through this program, we deliver solutions that provide comprehensive support for the design and development of products that feature our graphics IP cores in combination with R-Mobile, R-Car, and R-Home solutions.

DMP is a member of the Xilinx Alliance Program. Xilinx is the world’s leading provider of programmable platforms, with more than 50 percent market share in the programmable logic device (PLD) segment of the semiconductor industry (Source: iSuppli Corp.). Xilinx has a worldwide ecosystem of qualified companies through the Xilinx Alliance Program to help mutual customers develop their products faster and with confidence on Targeted Design Platforms. Alliance Member companies include FPGA IP providers, EDA vendors, embedded software providers, system integrators, and hardware suppliers. For more information on Xilinx, please go to http://www.xilinx.com/ or contact your local representative.

Industry standards

DMP’s graphics IP cores are compliant with standards that have been widely adopted in the embedded systems industry, such as bus interconnects and application programming interfaces (APIs). This reduces the costs and risks that our customers face in designing a new SoC (System-on-Chip), and makes it possible to reuse existing software assets.

The Khronos Group is an industry consortium whose aim is to establish open, industry standard APIs to allow rich media authoring and playback on a wide variety of platforms and devices. As a Contributor Member, DMP actively participates in the process of establishing API specifications such as OpenGL ES and OpenVG, and our products are compliant with these standards. Also, DMP is the only company in Japan to be accredited by the Khronos Group to conduct training courses for programmers. We also make a significant contribution to the proliferation of standard APIs by selling eLearning materials known as the Android 3D Graphics Learning Kit.

The HSA (Heterogeneous System Architecture) Foundation is a not-for-profit consortium for SoC IP vendors, OEMs, academia, SoC vendors, OSVs and ISVs whose goal is to make it easy to program for parallel computing. HSA members are building a heterogeneous compute ecosystem, rooted in industry standards, for combining scalar processing on the CPU with parallel processing on the GPU while enabling high bandwidth access to memory and high application performance at low power consumption.　By supporting HSA, DMP can expand and deepen our touch in terms of application development ecosystem and vertical industries that will be able to benefit by using DMP graphics IP for next generation consumer devices.

The Alliance was founded in May 2011 and is led by BDTI (www.BDTI.com). The Alliance is a membership-based collaboration dedicated to inspiring and empowering product developers to incorporate embedded vision　technology into their products. A key means of achieving this is providing design engineers with the practical information they need in order to effectively use embedded vision technology. The Alliance’s first step was the launch of its web site at www.Embedded-Vision.com . The site, increasing in content and visitors on a daily basis, serves as a source of practical information to help design engineers and application developers incorporate vision capabilities into their products. Access to resources on the web site, which are provided by Alliance staff and member companies, is free to all.

The OCP International Partnership Association, Inc. (OCP-IP) is a consortium for the semiconductor industry that was established in order to support, promote and strengthen the Open Core Protocol (OCP). OCP is a comprehensive interface socket for semiconductor IP cores that uses an open license protocol, and which has been adopted as a standard bus protocol for SoCs on a wide variety of systems. DMP’s graphics IP cores support OCP, which allows our customers to reduce the risks and costs associated with designing an SoC by ensuring mutual connectivity between IP cores.

Silicon and design service

DMP has joined the TSMC(The world largest semiconductor foundry) Soft IP Alliance Program as the first member from Japan Soft IP Alliance Program enriches TSMC’s IP alliance portfolio, encourages soft IP innovation and reuse through TSMC’s Open Innovation Platform® initiative, and helps to deliver power, performance and area optimization that is important to success at advanced technology nodes. Hereafter DMP becomes able to deliver leading edge and high quality graphics IP cores to worldwide business market through the program.

Software and system integration

DMP is strengthening its links with various tool vendors and system development partners in order to provide strong support in terms of hardware, software and technical training for the kind of application development and product planning at the system level that can extract the maximum functionality and performance from our graphics IP core products.