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Atrenta announced DMP has qualified their soft IP inclusion in the TSMC9000 IP library

2012.03.06

Atrenta Inc., a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries, announced that 10 intellectual property (IP) providers including Digital Media Professionals Inc. have qualified their soft IP for inclusion in the TSMC9000 IP library using Atrenta IP Handoff Package.

They quoted comment of Tatsuo Yamamoto, President & CEO, Digital Media Professionals Inc.;

“In support of our advanced graphics IP technology based on industry-standard OpenGL ES and DMP’s proprietary Maestro extension, we are able to leverage excellent semiconductor process technology from TSMC and comprehensive assessment metrics from Atrenta. With a wide-range of leading-edge technologies and eco-system support, DMP will provide highly optimized and validated graphics IPs for embedded markets.”

>>Press Release of  Atrenta

DMP Establish US Subsidiary and Appoints New Head to Run US Operations and Sales

2011.12.21

Petri Talala appointed as Vice President and General Manager of Digital Media Professionals USA Inc.

Tokyo, Japan and Campbell, California, USA – December 21st, 2011 – Digital Media Professionals Inc. (DMP), a leading provider of 2D/3D graphics Intellectual Property (IP) core, today announced the establishment of company’s subsidiary – Digital Media Professionals USA Inc. in Campbell, California, USA. The new subsidiary allows DMP to accelerate and execute its growth strategy more effectively in one its main target markets while providing the opportunity to serve existing and new customers locally in the USA. Effective in January 2012, Petri Talala, Vice President and General Manager, Sales, assumes the role of operational head in USA as well as the sales operations in USA, Europe and selected Asian countries. Mr. Talala will report directly to Tatsuo Yamamoto, CEO of DMP.

 

“DMP is truly amazing company. Their reputation with the industry, product portfolio, and strong experience in graphics hardware and technologies assures future success and huge potential to grow business in the USA already next year 2012 and beyond.” said Mr. Talala. “I am honored to join DMP and eager to accelerate our business and role in US as a leading graphics IP core provider and serve our customers and partners in their goals of delivering the best performing next generation graphics platforms.”


“I am excited to have Petri joining the DMP team and leading our US operations. Our establishment of a US entity and appointment of Petri represent DMP’s strong commitment to further expanding our global business. His experience and contacts in the graphics industry combined with his strong technical and business background and leadership skills will enable us to jump start our business in the US where many of our major target customers and strategic partners reside.”  said Mr. Yamamoto, CEO of DMP.

 

Mr. Petri Talala has made a distinguished career in the high tech industry, holding a number of executive level positions and playing key roles in building and developing businesses especially in the graphics industry. He has substantial experience in sales, marketing and business development honed from his successes at leading High Tech companies in North America and Europe, including Symbio, Futuremark, LM Ericsson and Tellabs Inc. Mr. Talala is based on Campbell, California and holds a Master of Science in Electrical Engineering and Executive Master of Business Administration from Aalto University in Helsinki, Finland.

 


About DMP

Digital Media Professionals Inc. (DMP)(TOKYO:3652) develops industry leading 2D and 3D graphics solutions to global consumer electronics, mobile, embedded and automotive markets. Company has been founded at Tokyo, Japan in 2002 and is currently developing several graphics IP cores based on the open Khronos™ Group standards and DMP’s cutting edge 3D graphics technology DMP Maestro Technology.

DMP announces two day Getting Start GLSL Programming training course

2007.06.25

DMP announced a two day getting start GLSL Programming training course. The OpenGL ES roadmap has been tailored to the diverse needs of the embedded industry and contains two tracks with “1.X” and “2.X” specification roadmaps that will evolve in parallel. The 1.X roadmap will continue to be developed for new-generation fixed function 3D accelerators while the 2.X roadmap will enable emerging programmable 3D pipelines.This course introduce the world of programmable pipeline by explaining basic topics of the GLSL(OpenGL Shading Language) which is a core feature of OpenGL ES 2.x and OpenGL 2.x.
(* This course is held in Japanese )

DMP’s "PICA" won the Excellent IP Prize of 9th LSI IP Design Award

2007.05.11

The Excellent IP PrizeDMP’s "PICA" 3D graphics IP core won the Excellent IP Prize which is the best prize of 9th LSI IP Dsign Award. The LSI Design Award Committee* evaluated not only high-speed and the high-quality drawing performance of PICA but also practicality, and reliability of PICA as hardware IP product.
( *constituted by Matsushita Electric Industrial Co., Ltd., NEC Electronics Corp., Toshiba Corp., Renesas Technology Corp., Fujitsu Ltd., Rohm Co., Ltd., Seiko Epson Corp., Meitec Corp., IPTC, Development Bank of Japan, and Nikkei Business Publications, Inc.)

Paper session   The ceremony   C.E.O. Tatsuo Yamamoto

DMP announces Advanced OpenGL ES Programming training course

2007.03.02

DMP announced one day of Advanced OpenGL ES Programming Training in Tokyo. This course demonstrates the more sophisticated techniques possible using the OpenGL ES 1.1. By explaining the techniques required to generate images of greater realism, the course provides deeper insights into OpenGL ES functionality. Also, this course refer to performance aspects of OpenGL ES application and basic concept of OpenGL ES 2.x. Participants must have programming knowledge (especially C), a good grasp of computer graphics concepts as well as a familiarity with the basic topics of the OpenGL ES 1.1.
( *This course is held in Japanese.)

DMP is bringing the PICA Graphics IP Core to ACM SIGGRAPH 2006.

2006.07.25

Visit us at SIGGRAPH 2006, Boston Convention Center, Booth #409 to see the PICA Graphics IP Core for embedded systems. DMP will demonstrate its MAESTRO-2G Technology that enables high-quality and high-performance visual effects for embedded devices.

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